Xmega Application Note | |||||
This file contains an example application that demonstrates the ADC driver. It shows how to set up the ADC to measure the voltage on four analog inputs. It uses the internal VCC/1.6 voltage as conversion reference. A number of samples are stored in an SRAM table for later examination.
The recommended test setup for this application is to connect five 10k resistors in series between GND and VCC source and connect the four resistor junctions to analog input ADCA4, ADCA5, ADCA6 and ADCA7.
To achieve the best performance, the voltage reference can be decoupled through the external ADC reference pins.
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Definition in file adc_example_polled.c.
#include "avr_compiler.h"
#include "adc_driver.h"
Go to the source code of this file.
Defines | |
#define | SAMPLE_COUNT 10 |
Functions | |
int | main (void) |
Variables | |
int16_t | adcSamples [4][SAMPLE_COUNT] |
volatile int8_t | offset |
#define SAMPLE_COUNT 10 |
How many samples for each ADC channel.
Definition at line 63 of file adc_example_polled.c.
int main | ( | void | ) |
Definition at line 70 of file adc_example_polled.c.
References ADC_CalibrationValues_Load(), ADC_Ch_Conversion_Complete, ADC_Ch_InputMode_and_Gain_Config, ADC_Ch_InputMux_Config, ADC_ConvMode_and_Resolution_Config, ADC_ConvMode_Signed, ADC_Disable, ADC_DRIVER_CH_GAIN_NONE, ADC_Enable, ADC_FreeRunning_Disable, ADC_FreeRunning_Enable, ADC_Offset_Get_Signed(), ADC_Prescaler_Config, ADC_Reference_Config, ADC_ResultCh_GetWord_Signed(), ADC_SweepChannels_Config, ADC_Wait_8MHz(), adcSamples, offset, and SAMPLE_COUNT.
00071 { 00072 /* Move stored calibration values to ADC A. */ 00073 ADC_CalibrationValues_Load(&ADCA); 00074 00075 /* Set up ADC A to have signed conversion mode and 12 bit resolution. */ 00076 ADC_ConvMode_and_Resolution_Config(&ADCA, ADC_ConvMode_Signed, ADC_RESOLUTION_12BIT_gc); 00077 00078 /* Set sample rate. */ 00079 ADC_Prescaler_Config(&ADCA, ADC_PRESCALER_DIV32_gc); 00080 00081 /* Set reference voltage on ADC A to be VCC/1.6 V.*/ 00082 ADC_Reference_Config(&ADCA, ADC_REFSEL_VCC_gc); 00083 00084 /* Setup channel 0, 1, 2 and 3 with different inputs. */ 00085 ADC_Ch_InputMode_and_Gain_Config(&ADCA.CH0, 00086 ADC_CH_INPUTMODE_DIFF_gc, 00087 ADC_DRIVER_CH_GAIN_NONE); 00088 00089 ADC_Ch_InputMode_and_Gain_Config(&ADCA.CH1, 00090 ADC_CH_INPUTMODE_INTERNAL_gc, 00091 ADC_DRIVER_CH_GAIN_NONE); 00092 00093 ADC_Ch_InputMode_and_Gain_Config(&ADCA.CH2, 00094 ADC_CH_INPUTMODE_SINGLEENDED_gc, 00095 ADC_DRIVER_CH_GAIN_NONE); 00096 00097 ADC_Ch_InputMode_and_Gain_Config(&ADCA.CH3, 00098 ADC_CH_INPUTMODE_SINGLEENDED_gc, 00099 ADC_DRIVER_CH_GAIN_NONE); 00100 00101 /* Get offset value for ADC A. */ 00102 ADC_Ch_InputMux_Config(&ADCA.CH0, ADC_CH_MUXPOS_PIN1_gc, ADC_CH_MUXNEG_PIN1_gc); 00103 00104 ADC_Enable(&ADCA); 00105 /* Wait until common mode voltage is stable. Default clk is 2MHz and 00106 * therefore below the maximum frequency to use this function. */ 00107 ADC_Wait_8MHz(&ADCA); 00108 offset = ADC_Offset_Get_Signed(&ADCA, &ADCA.CH0, false); 00109 ADC_Disable(&ADCA); 00110 00111 /* Set input to the channels in ADC A */ 00112 ADC_Ch_InputMux_Config(&ADCA.CH0, ADC_CH_MUXPOS_PIN2_gc, ADC_CH_MUXNEG_PIN3_gc); 00113 ADC_Ch_InputMux_Config(&ADCA.CH1, ADC_CH_MUXINT_SCALEDVCC_gc, 0); 00114 ADC_Ch_InputMux_Config(&ADCA.CH2, ADC_CH_MUXPOS_PIN3_gc, 0); 00115 ADC_Ch_InputMux_Config(&ADCA.CH3, ADC_CH_MUXPOS_PIN4_gc, 0); 00116 00117 /* Setup sweep of all four virtual channels. */ 00118 ADC_SweepChannels_Config(&ADCA, ADC_SWEEP_0123_gc); 00119 00120 /* Enable ADC A .*/ 00121 ADC_Enable(&ADCA); 00122 00123 /* Wait until common mode voltage is stable. Default clk is 2MHz and 00124 * therefore below the maximum frequency to use this function. */ 00125 ADC_Wait_8MHz(&ADCA); 00126 00127 /* Enable free running mode. */ 00128 ADC_FreeRunning_Enable(&ADCA); 00129 00130 /* Store samples in table.*/ 00131 for (uint16_t i = 0; i < SAMPLE_COUNT; ++i) { 00132 00133 do{ 00134 /* If the conversion on the ADCA channel 0 never is 00135 * complete this will be a deadlock. */ 00136 }while(!ADC_Ch_Conversion_Complete(&ADCA.CH0)); 00137 adcSamples[0][i] = ADC_ResultCh_GetWord_Signed(&ADCA.CH0, offset); 00138 00139 do{ 00140 /* If the conversion on the ADCA channel 1 never is 00141 * complete this will be a deadlock.*/ 00142 }while(!ADC_Ch_Conversion_Complete(&ADCA.CH1)); 00143 adcSamples[1][i] = ADC_ResultCh_GetWord_Signed(&ADCA.CH1, offset); 00144 00145 do{ 00146 /* If the conversion on the ADCA channel 2 never is 00147 * complete this will be a deadlock.*/ 00148 }while(!ADC_Ch_Conversion_Complete(&ADCA.CH2)); 00149 adcSamples[2][i] = ADC_ResultCh_GetWord_Signed(&ADCA.CH2, offset); 00150 00151 do{ 00152 /* If the conversion on the ADCA channel 3 never is 00153 * complete this will be a deadlock.*/ 00154 }while(!ADC_Ch_Conversion_Complete(&ADCA.CH3)); 00155 adcSamples[3][i] = ADC_ResultCh_GetWord_Signed(&ADCA.CH3, offset); 00156 } 00157 00158 /* Turn off free running and disable ADC module.*/ 00159 ADC_FreeRunning_Disable(&ADCA); 00160 ADC_Disable(&ADCA); 00161 00162 /* Infinite loop.*/ 00163 while (true){ 00164 } 00165 }
int16_t adcSamples[4][SAMPLE_COUNT] |
Sample storage (all four channels).
Definition at line 66 of file adc_example_polled.c.
volatile int8_t offset |
Definition at line 68 of file adc_example_polled.c.
Generated on Tue Aug 4 13:31:15 2009 for AVR1300 Using the XMEGA ADC by ![]() |